x86 Instruction Set Reference

FLDCW

Load x87 FPU Control Word

Opcode	Mnemonic	Description
`D9 /5`	`FLDCW m2byte`	Load FPU control word from m2byte.

Description
Loads the 16-bit source operand into the FPU control word. The source operand is a memory location. This instruction is typically used to establish or change the FPU's mode of operation. If one or more exception flags are set in the FPU status word prior to loading a new FPU control word and the new control word unmasks one or more of those exceptions, a floating-point exception will be generated upon execution of the next floating-point instruction (except for the no-wait floating-point instructions, see the section titled "Software Exception Handling" in Chapter 8 of the IA-32 Intel Architecture Software Developer's Manual, Volume 1). To avoid raising exceptions when changing FPU operating modes, clear any pending exceptions (using the FCLEX or FNCLEX instruction) before loading the new control word.

Description

Loads the 16-bit source operand into the FPU control word. The source operand is a memory location. This instruction is typically used to establish or change the FPU's mode of operation.

If one or more exception flags are set in the FPU status word prior to loading a new FPU control word and the new control word unmasks one or more of those exceptions, a floating-point exception will be generated upon execution of the next floating-point instruction (except for the no-wait floating-point instructions, see the section titled "Software Exception Handling" in Chapter 8 of the IA-32 Intel Architecture Software Developer's Manual, Volume 1). To avoid raising exceptions when changing FPU operating modes, clear any pending exceptions (using the FCLEX or FNCLEX instruction) before loading the new control word.

Operation
FPUControlWord = Source;

FPU flags affected
C0, C1, C2, C3 undefined.

Floating-Point Exceptions
None; however, this operation might unmask a pending exception in the FPU status word. That exception is then generated upon execution of the next "waiting" floating-point instruction.

Protected Mode Exceptions

`#GP(0)`	If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If the DS, ES, FS, or GS register is used to access memory and it contains a null segment selector.
`#GP(0)`	If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If the DS, ES, FS, or GS register is used to access memory and it contains a null segment selector.
`#SS(0)`	If a memory operand effective address is outside the SS segment limit.
`#NM`	EM or TS in CR0 is set.
`#PF(fault-code)`	If a page fault occurs.

Real-Address Mode Exceptions

`#GP`	If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.
`#GP`	If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.
`#SS`	If a memory operand effective address is outside the SS segment limit.

Virtual-8086 Mode Exceptions

`#GP(0)`	If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.
`#GP(0)`	If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.
`#SS(0)`	If a memory operand effective address is outside the SS segment limit.
`#NM`	EM or TS in CR0 is set.
`#PF(fault-code)`	If a page fault occurs.